High Performance Channel Decoders on CELL Broadband Engine for WiMAX System
Publish place: Telecommunication devices، Vol: 1، Issue: 1
Publish Year: 1391
Type: Journal paper
Language: English
View: 88
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Document National Code:
JR_TDMA-1-1_001
Index date: 19 August 2023
High Performance Channel Decoders on CELL Broadband Engine for WiMAX System abstract
Wireless baseband processing, which is characterized by high computational complexity and high data throughput, isregarded as the most challenging issue for software radio (SR) systems, especially for the General Purpose Processor(GPP)-based SR systems. To overcome this implementation difficulty in SR systems, the multicore architecture hasbeen proposed as the GPP-based SR platform, for example, multicore Central Processing Unit (CPU), GraphicProcessing Unit (GPU) and Cell processors. In this paper, the Cell processor is considered as the core component inthe GPP-based SR platform. The channel decoding modules for convolutional, Turbo and Low-density parity-check(LDPC) codes of WiMAX systems are investigated and efficiently implemented on Cell processor. With a singleSynergistic Processor Element (SPE) running at 3.2GHz, the implemented channel decoders can throughput up to30Mbps, 1.36Mbps and 1.71Mbps for the above three codes, respectively. Moreover, the decoding modules can beeasily integrated to the SR system and provide a highly integrated SR solution
High Performance Channel Decoders on CELL Broadband Engine for WiMAX System Keywords: