Effects of the Residual Stress and Bias Voltage on the Phase Diagram and Frequency Response of a Capacitive Micro-Structure

In this paper, static and dynamic behavior of a varactor of a micro-phase shifter under DC, step DC and AC voltages and effects of the residual stress on the phase diagram have been studied. By presenting a mathematical modeling, Galerkin-based step by step linearization method (SSLM) and Galerkin-based reduced order model have been used to solve the governing static and dynamic equations, respectively. The calculated static and dynamic pull-in voltages have been validated by previous experimental and theoretical results and a good agreement has been achieved. Then the frequency response and phase diagram of the system have been studied. It has been shown that increasing the bias voltage shifts down the phase diagram and left the frequency response. Also increasing the damping ratio shifts up the phase diagram. Finally, the effect of residual stress on the phase diagram has been studied.

Keywords:

MEMS , Phase shifter , Pull-in voltage , Phase diagram , Residual stress