An Integrated 8-12 GHz Fractional-N Frequency Synthesizer in 90-nm CMOS

This work presents a fully integrated 8-12 GHz fractional-N frequency synthesizer (FNPLL) for using in communication satellites. The FNPLL implemented in a 90-nm standard CMOS technology. The simulation results demonstrate that the Voltage Controlled Oscillator (VCO) has a phase noise of -106 dBc/Hz at 1-MHz offset for a 10 GHz Local Oscillator (LO) signal, and the higher fractional spur is -55 dBc in a 10-GHz LO signal. The proposed FNPLL consumes 5.029-6.579 mW from 1.2-V power supply and has a phase noise of -70 dBc/Hz, -88 dBc/Hz and -116 dBc/Hz at 10-KHz, 100-KHz and 1-MHz offsets, respectively.

An Integrated 8-12 GHz Fractional-N Frequency Synthesizer in 90-nm CMOS Keywords:

Fractional-N , Frequency Synthesizer , Phase Locked Loop , phase noise , 8-12 GHz Frequency Band