Implementation of a Unified DSP Coprocessor
Publish place: International Journal of Mechatronics, Electrical and Computer Technology، Vol: 2، Issue: 2
Publish Year: 1391
نوع سند: مقاله ژورنالی
زبان: English
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شناسه ملی سند علمی:
JR_IJMEC-2-2_002
تاریخ نمایه سازی: 16 فروردین 1395
Abstract:
Utilizing the DFT, the DHT, the DCT or the DST is an obvious choice in signal processing domain. This paper describes the implementation of a unified coprocessor of transform length '8' for the synchronous design in XC3S1400AN-4FG484 FPGA device of Xilinx Company. The operating frequency of 20 MHz is achieved. The paper presents the trade-offs involved in designing the architecture, the design for performance issues and the possibilities for future development.
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Authors
Mojdeh Mahdavi
Department of Electronics, Shahr Qods Branch, Islamic Azad University, Tehran, Iran