A Neuromorphic Realization of Spike-Timing-Dependent Synaptic Plasticity (STDP) on Microcontroller Platform

Spike Timing Dependent Plasticity is one of the synaptic plasticity rules that plays a key objective in learning and memory in the brain. This paper proposes a hardware implementation of the PSTDP rule on microcontroller platform. Simulation and implementation results demonstrate how well the proposed hardware can alter synaptic weights according to the timing differences between a set of different patterns of spikes. We believe that the proposed design can play a significant role in future hardware implementations of both spike timing and rate based neuromorphic learning on low-cost and embedded systems

Keywords:

Spiking Neural Network (SNN) , Synaptic learning rule , Spike-Timing-Dependent Synaptic Plasticity (STDP) , Microcontroller