Aging in Current Mirrors
Publish place: 2nd International Conference on Electrical Engineering
Publish Year: 1396
نوع سند: مقاله کنفرانسی
زبان: English
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شناسه ملی سند علمی:
ICELE02_345
تاریخ نمایه سازی: 7 اسفند 1396
Abstract:
Transistor aging effects are a major concern for device scientists, trying to integrate reliable circuits in unreliable ultra-scaled CMOS processes. On the other hand, current mirror is an import part in circuit for biasing. This paper discuss the aging effect on different type of current mirrors. The simulation is done in HSPICE with 32nm PTM model
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Authors
Zhila Amini-sheshdeh
Faculty of Engineering, Alzahra University