Optimal Design of a ۶.۵ GHz Low Noise and High Gain CMOS Low Noise Amplifier By Single Objective Firefly Algorithm
Publish place: Electronics Industries Quarterly، Vol: 13، Issue: 1
Publish Year: 1401
Type: Journal paper
Language: Persian
View: 152
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Document National Code:
JR_SAIRAN-13-1_004
Index date: 17 April 2023
Optimal Design of a ۶.۵ GHz Low Noise and High Gain CMOS Low Noise Amplifier By Single Objective Firefly Algorithm abstract
A high-gain, low-power, highly linear cascode low noise amplifier (LNA) is considered with the circuit of an inductive source degeneration for employing at ۶.۵ GHz frequency; it is optimized by a capable swarm-based optimizer named firefly algorithm (FA) as an evolutionary method. By optimization of the noise figure (NF) and gain, the FA is useful while verifying all the design restrictions, e.g., the input and output matching, inverse isolation, linearity and power dissipation. Two situation studies have been accomplished for minimization of NF and maximization of gain. These two parameters optimization have been carried out by considering all parameters, for instance, a single objective function. The FA-based optimal consider paramet
Optimal Design of a ۶.۵ GHz Low Noise and High Gain CMOS Low Noise Amplifier By Single Objective Firefly Algorithm authors
مریم باباصفری
گروه برق، دانشکده فنی مهندسی، دانشگاه زنجان
محمد مصطفوی
برق ، مهندسی ؛ زنجان ؛ ایران ؛ زنجان