Designing a Novel high-speed ternary-logic multiplier using GNRFET Technology
Publish place: Journal of Optoelectronical Nanostructures، Vol: 8، Issue: 1
Publish Year: 1402
Type: Journal paper
Language: English
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Document National Code:
JR_JOPN-8-1_001
Index date: 14 February 2024
Designing a Novel high-speed ternary-logic multiplier using GNRFET Technology abstract
Abstract:This paper presents a novel design of a ternary multiplierbased on graphene nanoribbon field-effect transistor(GNRFET). GNRFET, as a new material with superiorphysical and electronic properties, can be a good choiceinstead of conventional devices such as metal–oxide–semiconductor field-effect transistor (MOSFET) andCNTFET. Moreover, multiple-valued logic (MVL) canhelp to reduce area and decrease the computational stepcompared with binary logic. We proposed a ternarymultiplier with the resistors to produce ternary logic. Theproposed multiplier performances are analyzed byevaluating the delay, power, and power-delay product(PDP), with 15 nm process technologies based onGNRFET. The simulation results with HSPICEdemonstrate that the proposed design frameworkoutperforms state-of-the-art designs in circuit parameters.
Designing a Novel high-speed ternary-logic multiplier using GNRFET Technology Keywords:
Designing a Novel high-speed ternary-logic multiplier using GNRFET Technology authors
Zahra Rohani
Computer Department of Computer Engineering, Kerman Branch, Islamic Azad University, Kerman, Iran.
Azadeh Alsadat Emrani Zarandi
Department of Computer Engineering, Shahid Bahonar University of Kerman, Kerman, Iran.
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