Designing and Layouting Single Supply fully differential Low Voltage 4Bit Flash Analog to Digital Quantizer for Double side input Rang
Publish place: First Iranian Conference on Nano Electronics
Publish Year: 1391
Type: Conference paper
Language: English
View: 1,199
This Paper With 5 Page And PDF Format Ready To Download
- Certificate
- I'm the author of the paper
Export:
Document National Code:
ICNE01_120
Index date: 30 April 2013
Designing and Layouting Single Supply fully differential Low Voltage 4Bit Flash Analog to Digital Quantizer for Double side input Rang abstract
In this paper a new high 4bit flash analog to digital (ADC) is presented that can be used in a N bit Flash ADC converter as continuous and discrete timeSigma-delta modulator quantizer. It has been implemented and layouted and tested by CADENCE software in 0.18μm CMOS technology. Its main advantages are: it works withsingle supply and measure positive and negative input voltage range. Compact architecture based on MOStransistor only, without any passive components such asresistance ladder or switch capacitance, fully differential input and output voltages, operating at very low voltage. Itoperates at 300Msample/s, suitable for over sampled data converter. The simulation shows 3.8mW power consumption for the whole ADC. Simulation results of the circuit in a 0.025-mm CMOS process confirm the effectiveness of the approaches to considerably reduce thepower consumption of high-speed quantizer. Finally, the quantizer has been put a first order sigma-delta modulator analog to digital convertor (ADC) and has been tested. By this 4bit quantizer, we get 10DB improve in SNR of sigmadelta modulator rather than quantizer of ref [3]. Its result proofs our idea.
Designing and Layouting Single Supply fully differential Low Voltage 4Bit Flash Analog to Digital Quantizer for Double side input Rang Keywords:
Designing and Layouting Single Supply fully differential Low Voltage 4Bit Flash Analog to Digital Quantizer for Double side input Rang authors
Saman Kaedi
Department of Electrical and Computer Engineering Chamran University Ahwaz, Iran
مراجع و منابع این Paper:
لیست زیر مراجع و منابع استفاده شده در این Paper را نمایش می دهد. این مراجع به صورت کاملا ماشینی و بر اساس هوش مصنوعی استخراج شده اند و لذا ممکن است دارای اشکالاتی باشند که به مرور زمان دقت استخراج این محتوا افزایش می یابد. مراجعی که مقالات مربوط به آنها در سیویلیکا نمایه شده و پیدا شده اند، به خود Paper لینک شده اند :