A Novel Evolutionary Method for Designing Optimized Multifunctional Logic Modules

In this paper, we proposed a novel heuristic method based on Imperialist competitive Algorithm (ICA) to design logic modules which performing different arithmetic functions. In conventional methods, for designing multi functional circuit, for each specific function, a distinct circuit is designed and then all of them will be combined together with multiplexer(s) to have desired circuit but in our proposed method the whole structure of circuit is designed and then optimized in one procedure by ICA Algorithm. We tried to optimize the area of circuit by reducing the number of transistors forming logic gates. To show the validity of this method, we design two circuits, first a full adder-subtractor circuit with a control bit and second a multi-function circuit which performs addition, subtraction, multiplication and comparison operation at the same time. Simulation was done in MATLAB 2009 and results shows that our method significantly reduces the number of transistors and gates and accordingly the area of circuits. Using such circuits in Arithmetic logic unit (ALU) of Central Processing Unit (CPU) can reduce the surface and power consumption of IC.

Keywords:

Imperialist Competitive Algorithm , Logic Circuit , Multi Functional Module , Optimization