Back-to-Back Stacked Multicell Converter

This paper proposes a new topology for a stacked multicell converter (SMC) that generates higher number of output voltage levels with lower number of power electronicswitches. This topology is composed of two conventional SM converters, which are connected back to back by two lowfrequencyswitches. In comparison with the conventional SM converter, the main advantages of the proposed topology are increased number of output voltage levels, reduced numbersof switches and capacitors, and decreasing the converter losses. Furthermore, the stored energy and voltage rating offlying capacitors are reduced. A new method for determination of the value of the dc voltage source has also been presented. The proposed converter is simulated using PSCAD/EMTDC software and the results are presented to validate the effectiveness of the proposed topology.

Keywords:

component , Flying capacitor multicell converter , Stacked Multicell converter , pulse width modulation (PWM