Design and VLSI Implementation of New Hardware Architectures for Image Filtering

Nowadays, hardware implementation of image andvideo processing algorithms is highly attractive. Needing to realtimeprocessing makes hardware implementation of thesealgorithms inevitable. In most of image and video processingalgorithms, pre-processing filters are the first and mostimportant stage of the algorithm. In this paper, we propose newhardware architectures for the implementation of image filtersincluding Gaussian, median and weighted median filters. Theproposed architectures aim to optimize the filter implementationfor speed and gate usage. The proposed architectures areimplemented and synthesized in ASIC with 65nm technology anddifferent specification of the implementation such as maximumclock frequency and IC area are reported.

Keywords:

Gaussian filter , Median filter , Weighted Median filter , hardware architecture , ASIC implementation , Real-time processing ,