A Combined Method to Improve Sequential Circuit Test Generation

This paper proposes a combined method for sequential circuit test generation which employs STGbased and GA-based test generation techniques. Almost all previous hybrid test generators use algorithmic decomposition, but the proposed method uses circuit decomposition. So the STG-based techniques are used to generate test for control unit and test generation for datapath unit is performed by resorting to GA-based techniques. The combination of the two techniques is expected to provide high fault coverages in a reasonable time. Experimental results show the effectiveness of the approach.