High performance and Efficient CNTFET based Full Adder Cells

A novel Full Adder (FA) circuit is presented. These design benefit from higher computing speed, lower operating voltage, lower energy consumption, less Vth loss in circuit nodes, and full swing results. In the other word, the proposed FA cells work properly in low supply voltages. The proposed FA is implemented in MOSFET-like carbon nanotube technology and the simulation results using HSPICE show that there are substantial improvements in both power and performance of the proposedcircuit compared to the other classical and state-of-the-art CMOS and CNFET-based designs, existing in the literatures.

Keywords:

CNFET , Low-Voltage , Low-Power , threshold voltage of CNFET (Vth)