New CNFET- Based Full Adder cells for Low- Power and Low- Voltage Applications
Publish place: Journal of Advances in Computer Research، Vol: 7، Issue: 3
Publish Year: 1395
Type: Journal paper
Language: English
View: 558
This Paper With 12 Page And PDF Format Ready To Download
- Certificate
- I'm the author of the paper
Export:
Document National Code:
JR_JACR-7-3_005
Index date: 1 January 2017
New CNFET- Based Full Adder cells for Low- Power and Low- Voltage Applications abstract
Scaling challenges and limitations of conventional silicon transistors have led the designers to apply novel nano-technologies. One of the most promising and possible nano-technologies is CNT (Carbon Nanotube) based transistors. CNFET have emerged as the more practicable and promising alternative device compared to the other nanotechnologies. This technology has higher efficiency compared to the silicon-based MOSFET and is appropriate for high-frequency applications. Full Adder cell is the essential core and the building block of most arithmetic circuits and is placed on most parts of their critical paths .In this paper, power-efficient CNFET (Carbon Nanotube Field Effect Transistor) based Full Adder cell is proposed. This design is simulated in several supply voltages, frequencies and load capacitors using HSPICE circuit simulator. Considerable improvement is achieved in terms of power and PDP (Power-Delay-Product) in comparison with other classical CNFET-based designs, in the literature. Our proposed Full Adder can also drive large load capacitance and works properly in low supply voltages.
New CNFET- Based Full Adder cells for Low- Power and Low- Voltage Applications Keywords:
New CNFET- Based Full Adder cells for Low- Power and Low- Voltage Applications authors
Mehdi Bagherizadeh
Department of Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran
Mohammad Eshghi
Faculty of Electrical Engineering, Shahid Beheshti University. G.C., Tehran, Iran