A High Linearity High Gain 5 GHz CMOS LNA For IEEE802.16a Front End
Publish place: 14th Iranian Conference on Electric Engineering
Publish Year: 1385
Type: Conference paper
Language: English
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Document National Code:
ICEE14_294
Index date: 15 July 2008
A High Linearity High Gain 5 GHz CMOS LNA For IEEE802.16a Front End abstract
A 5.25 GHz low noise amplifier (LNA), has been proposed for use in a receiver architecture for IEEE802.16a WMAN. The targeted frequency band is the un-licensed band UNII 5 GHz. The amplifier has been simulated with two different spiral inductor models as Ld . In our spiral inductor model we have improved "the Greenhouse spiral inductor model", then we compare the results with the case when we use the spiral inductor model of the technology. The amplifier achieves voltage gain of 18, 20 dB with a noise figure of only 2, 2.1 dB, the IIP3 is 14, 13.1 dBm and the reverse isolation is about -9.1, -10 dB for our spiral inductor model and that of technology, respectively. Using a 0.18μm CMOS process, the LNA dissipates 7.1 mW from a 1.8V supply voltage in both cases. In this paper, we present an analysis of the LNA architecture.
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A High Linearity High Gain 5 GHz CMOS LNA For IEEE802.16a Front End authors
Fatemeh Kalantari
VLSI Lab, Electrical & Computer Engineering Department University of Tehran
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