A Low Power 128-point FFT Processor with Constant-Coefficient Multipliers

In this paper, we present a low power 128-point FFT/IFFT processor working in a 480 Mbps OFDM system. The proposed FFT/IFFT processor can be used in high speed signal processing applications such as IEEE P802.15.3a proposal for UWB. Due to the high frequency of operation, the pipeline architecture is used. Moreover, in order to decrease the power consumption, modified constant-coefficient complex multipliers are employed. By using these multipliers and employing CSD representation of twiddle factors, total power consumption of the proposed FFT/IFFT processor is drastically decreased. It is estimated to be about 10 mW in a 0.13 μm process working at 528 MHz with a 1-V power supply.

Keywords:

FFT processor , Low-power , Modified constant-coefficient multipliers , OFDM