A Compact Low-Voltage CMOS structure based on Neural Network and TLBO Algorithm for Variable Gain Amplifier

A compact low-voltage low-power variable gain amplifier is proposed in 180 nm CMOSstandard technology. The proposed circuit consists of a pseudo-approximation exponentialcircuit based on 2nd Taylor approximation and new low-voltage high accurate current dividerin order to control the gain. The proposed VGA is modeled with neural network while TLBOalgorithm is used to optimize it Simulation results By using the achieved results of the TLBOalgorithm and HSPICE show more than 19 dB dynamic range variation in transresistancecharacteristic while the linearity error is less than ±1 dB. The 3-db bandwidth is 45 MHz andtotal harmonic distortion (THD) is less than 0.3% (at 100 kHz) .The total power consumptionis below 0.12 mW with a single 1V power supply.

Keywords:

CMOS analog integrated circuit , Variable Gain Amplifier , Transresistance , pseudo exponential , High-Accurate , Low-voltage circuit , Neural Network , TLBO