Novel Design Low Power, High Noise Immunity 1-bit Digital Comparator in CNFET Technology

One of the most important components of a central processing unit, arithmetic logic unit, floating-point unit, Multiplayers block of FPGA and address production unit, such as cache or memory access are 1-bit Digital comparator. Moreover, in essential applications such as Digital Signal Processing (DSP) and microprocessor architectures. Comparator cells are considered as predominant components. In other words. 1-bit Digital Comparator circuits play significant role as a primary building block in design and implementation of mathematical logic cells. As a result, design of high performance and optimized Comparator cells is very important and in dispensable at today electronic technologies. Design of high-speed and low power circuits is the most important objective in the field of Very Large Scale Integrated circuits (VLSI) and have led us to turn the nanometer technologies. Furthermore, in 32-nm Complementary Metal Oxide Semiconductor (CMOS) technologies and lower, we observe an increase of power leakage. One of suggestions to overcome this issue is to use carbon nanotube field-effect transistors (CNFET). In this paper, we have designed and simulated 1-bit Digital Comparator circuit utilizing Modified-Gate Diffusion Input (MOD-GDI) technique at 32-nm CNFET technology and have compared with 1-bit Digital Comparator circuits presented by Pass Transistor Logic (PTL), Gate Diffusion Input (GDI) techniques in previous papers. Significant improvement is shown in average power consumption, Propagation Delay and the Power-Delay product (PDP) of Comparator cell designs by using CNFETs in comparison with CMOS technology. Moreover, to improve the Noise Immunity, a 10 transistors circuit design has been suggested in the form of MOD-GDI techniques. All simulations have been performed through Synopsys HSPICE with 32-nm CMOS and 32-nm standard CNFET technologies. Simulation results is shown depict significant decreases in terms average power consumption, propagation delay and power-delay product of CNFET based Comparator circuits with approximately more than 98.58%, 21.21% and 98.92%, respectively compared to previous papers in the CMOS technology.

Novel Design Low Power, High Noise Immunity 1-bit Digital Comparator in CNFET Technology Keywords:

Average power consumption , Carbon nanotubes field-effect transistors (CNFET) , Comparator , Modified-Gate Diffusion Input (MOD-GDI)