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Conference Paper
Wide-Range, Low-Jitter Frequency Synthesizer Using Common Mode DC Setting Strategy in VCDL
Authors:
Sobhan Sofi Mowloodi
،
Farhad Razaghian
Year 1395
Publish place:
The first international conference of modern research engineers in electricity and computer
Pages:
5
| Language: English
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Conference Paper
Wide-Range Delay Locked Loop Based Frequency Synthesizer with Improved Dead-Zone Open-Loop Phase Detector
Authors:
Sobhan Sofimowloodi
،
Seyyed Mohammad Alvi
Year 1393
Publish place:
6th iranian conference on electrical and electronic engineering
Pages:
6
| Language: English
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Journal Paper
A Low-Jitter 20-110MHz DLL Based on a Simple PD andCommon-Mode Voltage Level Corrected Differential DelayElements
Authors:
Sarang Kazeminia
،
Khayrollah Hadidi
،
Abdollah Khoei
Year 1393
Publish place:
The Journal of Information Systems and Telecommunication (JIST) Issue 7، Vol 2
Pages:
7
| Language: English
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Journal Paper
Dual Phase Detector Based on Delay Locked Loop for High Speed Applications
Authors:
m gholami
،
g ardeshir
Year 1393
Publish place:
International Journal of Engineering (IJE) Issue 4، Vol 27
Pages:
6
| Language: English
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Journal Paper
High Speed Delay-Locked Loop for Multiple Clock Phase Generation
Authors:
A Ghanbari
،
A Sadr
،
M Nikoo
Year 1392
Publish place:
Journal of Electrical and Computer Engineering Innovations Issue 1، Vol 1
Pages:
9
| Language: English
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Conference Paper
A 3 GHz CMOS DLL-Based Frequency Multiplier
Authors:
R Sadeghpour
،
M Parvizi
،
H Abdollahi
،
A Nabavi
Year 1387
Publish place:
16th Iranian Conference on Electric Engineering
Pages:
5
| Language: English
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