High Level Comparison of Full Adders in Verilog

Comparing different full adders is very significant for VLSI design as they are essential components in almost all digital circuits. The science has yield the benchmarking work laborious as often distinct implementation techniques and technologies have been used in the design. Additionally, the design characteristics which are selected for performance analysis are not consistent. This paper shows the results of comparing four adder structures by implementing them all with the same technology and the same level of abstraction.

Keywords:

Carry-Select Adder , Carry-Look-Ahead Adder , Carry-Skip adder , Brent-Kung Adder