Analysis and Modeling Time to Digital Converter Gain based on Markov Chain

A linearized gain expression for time to digital converter (TDC), which is used in clock and data recovery (CDR) circuit, is proposed in this paper based on Markov chain. Since TDC is composed of D-flip flops, it suffers from metastability failure. With sufficient noise present in the structure, TDC is modeled and more accurate gain expression is derived in terms of input jitter. MATLAB simulation results show that the higher values of input jitter decreases the TDC gain. Also, it is shown that for the specific dynamic range, better resolution leads to lower TDC gain and more required number of stages in TDC design.

Keywords:

time to digital converter gain , Markov chain , random input jitter , resolution.