Noval Symmetric/Asymmetric Structure of Multilevel Inverter in Order to Reduce the Number of Switches and Total Blocking Voltage

In this paper, a new multilevel inverter is designed to improve the power and voltage quality, which contains a lesser number of switches in the specified voltagelevels. The proposed inverter includes power electronic devices such as switches and diode, and DC inputs. In the proposed structure, considering a basic cell including a DCsource, a power switch and a diode, two levels are added to the output levels of the base structure. In the proposed structure, two levels will be added to the output voltage,simply by adding a switch, which results in reduction of the number of power switches compared to classical topologies and similar studies. The proposed topologyperformance principles are illustrated with a single-phase, nine-level inverter. This topology is studied through simulations in Matlab/Simulink environment. The results ofcomparing the proposed structure with the classical topology and similar topologies reveal that the proposed structure is superior to previous versions in terms of number ofswitches, number of drivers, and amount of total blocking voltage.

Keywords:

Classical topology , multilevel inverter , reduced number of devices , loss analysis