CMOS Fast Transient Low-Dropout Regulator

In this paper a fast transient response CFA-based lowdropout regulator (LDO) is introduced. The circuit is stable for 0-100mA output load current and a 1μF output capacitor withoutany internal compensation. The CFA consists of a voltage follower with output local current-current feedback based on alevel-shifted flipped voltage follower (LSFVF) which is instrumental to achieve high regulation and fast transient response. The inverting output buffer stage of the CFA togetherwith current-mirror-based driving of the pass transistor results in high PSRR. Full transistor-level simulation results for an AMS0.35μm CMOS process design reveal that the proposed LDO dissipates 58μA quiescent current at no-load condition and in worst case conditions has a current efficiency of 99.8%. For a 1μF output capacitor, the maximum output voltage variation to a 0-100mA load transient with rise and fall time of 10 and 100ns is only 2.5mV, and the PSRR is smaller than -58dB over the entire load current range

Keywords:

fast transient , level-shifted flipped voltage follower , low-dropout