Decimal multipliers using binary coded decimal (BCD) modules

Computer systems memory is capable of storing data in binary form and usually performscomputations in that representation which causes some precision errors. Because the errorsresulting from binary to decimal digit conversion could not be tolerated in some applicationswhich require high precision results, and software methods for implementing such calculationsare not computationally efficient; in recent years hardware manufacturers has begun to produceCPUs with decimal hardware units which directly perform computations on data with decimalrepresentation. A basic decimal operation is multiplication that can be implemented by iterative,parallel and digit-by-digit multipliers. Regardless of degree of parallelism of decimal multipliers,they can be implemented with BCD-digit multiplier blocks. In this article, in addition toinvestigating various kinds of decimal multipliers, a new approach for multiplying decimal digitshave been presented; Using this multiplier blocks, two different kinds of multipliers have beenproposed and compared to previous parallel multipliers; finally, area and delay comparisons havebeen provided.

Keywords:

BCD digit-by-digit multiplier , parallel decimal multiplier , iterative decimal multiplier