Variability effects on Full Adders utilized at Finite Impulse Response (FIR) filter implementation

In recent years, the variability of integrated circuits and its effects are the subject that has occupied the minds of digital designers. The variability of parameters in deep sub-micron technology has significant effects on the expected response, reliability, accuracy, and delay. These effects usually appear after Integrated Circuits (ICs) are manufactured. Therefore, knowing and predicting variability effects on ICs before they are manufactured and applying these effects in designing them help design and improve them greatly. This paper examines variability from the device level to the module level. To do so, efforts are made to module variability effects on full adders as basic cells in Digital Signal Processing (DSP) blocks in order to extract delays and errors caused by them. Then, the effects of applying these full adders at a higher level of integrated circuits such as digital filters are investigated. For this purpose, 8 types of full adders (i.e., TFA, 11T, CMOS, CPL and Hybrid) are studied under variability effects on a scale below 111 microns.Findings from this study assist digital designers with insights into the amount of delay and error caused by the variability effect at the related gate and help by which designers can select the working frequency of their designing circuits

Keywords:

Delay , Digital filter , Full adder , Variability