Design and Implementation of an Uitra-Wide Band, High Precision, and Low Noise Frequency Synthesizer

This paper presents system-level design and implementation of an ultra-wide tunable, high precision, fast locking, low phase noise, and low power portable fractional-N frequency synthesizer. The output frequency of the proposed design is ranged from 54 MHz to 6.8 GHz. The VCO cores cover frequencies from 3.4 GHz to 6.8 GHz. The programmable output dividers allow generation of the lower frequencies. The output power is tunable between -4dBm and +5dBm. It can generate a wide range, high precision, and linear frequency sweep. The sweep rate, frequency step, and frequency range are tunable. The new frequency tuning algorithm, named Yas algorithm, is proposed to improve frequency precision of the synthesizer. To demonstrate the efficiency of the Yas algorithm, the results of MATLAB simulations and experimental measurements are presented. The output phase noise is -95.55 dBc/Hz at 1 KHz offset from 3 GHz. The experimental measurement results demonstrate that the implemented frequency synthesizer can be used for applications, such as oscillator of spectrum analyzer, automatic test equipment, FMCW radars, high-performance clock source for high speed data converter, satellite communications, and measurement systems.

Keywords:

Frequency Synthesizer , Wide Band , High Precision , Low Power , Phase-locked Loop (PLL)