Investigation of Novel Carrier Overlapping PWM Methods for Nine-Level Diode Clamped Inverter

Transformerless multilevel voltage source inverter topologies offer numerous advantages that their use is increasing in the industry such as; derivation of a refined output voltage with reduced total harmonic distortion (THD), reduction of voltage ratings of the power semiconductor switching devices and also the reduced electro-magnetic-interference problems etc. In this paper, three novel Carrier Overlapping Pulse Width Modulation (COPWM) methods for the Nine-Level Diode-clamped MultiLevel Inverter (DCMLI) topology are presented and compared with each other. Also, an analysis of how distance among overlapped carriers which means Carrier Overlapping Factor (COF) affect output voltage waveform and THD for the nine-level diode clamped inverter is conducted. Novel COPWM methods and different COFs for nine-level DCMLI are investigated and simulated by MATLAB simulation software and proposed the best value of COF for carrier overlapping modulation

Keywords:

THD , COPWM , DCMLI , COF