Design of High Speed and low power D Flip-Flop by CNTFET Technology

Flip-flops are widely used to receive and maintain data in selected sequences during recurring clock intervals for a limited period of time sufficient for other circuits within a system. So increasing the speed and decreasing power of the flipflops caused to increase the total speed and decrease power of the circuits. This paper purpose is twofold, High-Speed and low power design of D flip-flop using Carbon Nano Tube Field Effect Transistors (CNTFETs). The proposed designs weresimulated using HSPICE simulator with 32nm Stanford CNTFET model. simulation results is based upon 1 volt power supply voltage and operating frequency at 1 GHZ, the proposed designs is 44% faster and consumes 29% less power compared with recent existing conventional CNTFET based D flip-flop circuits.

Keywords:

CNT , CNTFET , D Flip-Flop , High Speed , Circuit simulation